| 498 |
|
|
| 499 |
/* Interrupt vectors */ |
/* Interrupt vectors */ |
| 500 |
/* Vector 0 is the reset vector */ |
/* Vector 0 is the reset vector */ |
| 501 |
#define SIG_INTERRUPT0 _VECTOR(1) |
/* External Interrupt Request 0 */ |
| 502 |
#define SIG_PIN_CHANGE0 _VECTOR(2) |
#define INT0_vect _VECTOR(1) |
| 503 |
#define SIG_PIN_CHANGE1 _VECTOR(3) |
#define SIG_INTERRUPT0 _VECTOR(1) |
| 504 |
#define SIG_OUTPUT_COMPARE2 _VECTOR(4) |
|
| 505 |
#define SIG_OVERFLOW2 _VECTOR(5) |
/* Pin Change Interrupt Request 0 */ |
| 506 |
#define SIG_INPUT_CAPTURE1 _VECTOR(6) |
#define PCINT0_vect _VECTOR(2) |
| 507 |
#define SIG_OUTPUT_COMPARE1A _VECTOR(7) |
#define SIG_PIN_CHANGE0 _VECTOR(2) |
| 508 |
#define SIG_OUTPUT_COMPARE1B _VECTOR(8) |
|
| 509 |
#define SIG_OVERFLOW1 _VECTOR(9) |
/* Pin Change Interrupt Request 1 */ |
| 510 |
#define SIG_OUTPUT_COMPARE0 _VECTOR(10) |
#define PCINT1_vect _VECTOR(3) |
| 511 |
#define SIG_OVERFLOW0 _VECTOR(11) |
#define SIG_PIN_CHANGE1 _VECTOR(3) |
| 512 |
#define SIG_SPI _VECTOR(12) |
|
| 513 |
#define SIG_UART_RECV _VECTOR(13) |
/* Timer/Counter2 Compare Match */ |
| 514 |
#define SIG_UART_DATA _VECTOR(14) |
#define TIMER2_COMP_vect _VECTOR(4) |
| 515 |
#define SIG_UART_TRANS _VECTOR(15) |
#define SIG_OUTPUT_COMPARE2 _VECTOR(4) |
| 516 |
#define SIG_USI_START _VECTOR(16) |
|
| 517 |
#define SIG_USI_OVERFLOW _VECTOR(17) |
/* Timer/Counter2 Overflow */ |
| 518 |
#define SIG_COMPARATOR _VECTOR(18) |
#define TIMER2_OVF_vect _VECTOR(5) |
| 519 |
#define SIG_ADC _VECTOR(19) |
#define SIG_OVERFLOW2 _VECTOR(5) |
| 520 |
#define SIG_EEPROM_READY _VECTOR(20) |
|
| 521 |
|
/* Timer/Counter1 Capture Event */ |
| 522 |
|
#define TIMER1_CAPT_vect _VECTOR(6) |
| 523 |
|
#define SIG_INPUT_CAPTURE1 _VECTOR(6) |
| 524 |
|
|
| 525 |
|
/* Timer/Counter1 Compare Match A */ |
| 526 |
|
#define TIMER1_COMPA_vect _VECTOR(7) |
| 527 |
|
#define SIG_OUTPUT_COMPARE1A _VECTOR(7) |
| 528 |
|
|
| 529 |
|
/* Timer/Counter Compare Match B */ |
| 530 |
|
#define TIMER1_COMPB_vect _VECTOR(8) |
| 531 |
|
#define SIG_OUTPUT_COMPARE1B _VECTOR(8) |
| 532 |
|
|
| 533 |
|
/* Timer/Counter1 Overflow */ |
| 534 |
|
#define TIMER1_OVF_vect _VECTOR(9) |
| 535 |
|
#define SIG_OVERFLOW1 _VECTOR(9) |
| 536 |
|
|
| 537 |
|
/* Timer/Counter0 Compare Match */ |
| 538 |
|
#define TIMER0_COMP_vect _VECTOR(10) |
| 539 |
|
#define SIG_OUTPUT_COMPARE0 _VECTOR(10) |
| 540 |
|
|
| 541 |
|
/* Timer/Counter0 Overflow */ |
| 542 |
|
#define TIMER0_OVF_vect _VECTOR(11) |
| 543 |
|
#define SIG_OVERFLOW0 _VECTOR(11) |
| 544 |
|
|
| 545 |
|
/* SPI Serial Transfer Complete */ |
| 546 |
|
#define SPI_STC_vect _VECTOR(12) |
| 547 |
|
#define SIG_SPI _VECTOR(12) |
| 548 |
|
|
| 549 |
|
/* USART0, Rx Complete */ |
| 550 |
|
#define USART0_RX_vect _VECTOR(13) |
| 551 |
|
#define SIG_UART_RECV _VECTOR(13) |
| 552 |
|
|
| 553 |
|
/* USART0 Data register Empty */ |
| 554 |
|
#define USART0_UDRE_vect _VECTOR(14) |
| 555 |
|
#define SIG_UART_DATA _VECTOR(14) |
| 556 |
|
|
| 557 |
|
/* USART0, Tx Complete */ |
| 558 |
|
#define USART0_TX_vect _VECTOR(15) |
| 559 |
|
#define SIG_UART_TRANS _VECTOR(15) |
| 560 |
|
|
| 561 |
|
/* USI Start Condition */ |
| 562 |
|
#define USI_START_vect _VECTOR(16) |
| 563 |
|
#define SIG_USI_START _VECTOR(16) |
| 564 |
|
|
| 565 |
|
/* USI Overflow */ |
| 566 |
|
#define USI_OVERFLOW_vect _VECTOR(17) |
| 567 |
|
#define SIG_USI_OVERFLOW _VECTOR(17) |
| 568 |
|
|
| 569 |
|
/* Analog Comparator */ |
| 570 |
|
#define ANALOG_COMP_vect _VECTOR(18) |
| 571 |
|
#define SIG_COMPARATOR _VECTOR(18) |
| 572 |
|
|
| 573 |
|
/* ADC Conversion Complete */ |
| 574 |
|
#define ADC_vect _VECTOR(19) |
| 575 |
|
#define SIG_ADC _VECTOR(19) |
| 576 |
|
|
| 577 |
|
/* EEPROM Ready */ |
| 578 |
|
#define EE_READY_vect _VECTOR(20) |
| 579 |
|
#define SIG_EEPROM_READY _VECTOR(20) |
| 580 |
|
|
| 581 |
|
/* Store Program Memory Read */ |
| 582 |
|
#define SPM_READY_vect _VECTOR(21) |
| 583 |
|
#define SIG_SPM_READY _VECTOR(21) |
| 584 |
|
|
| 585 |
#define SIG_SPM_READY _VECTOR(21) |
#define SIG_SPM_READY _VECTOR(21) |
| 586 |
/* Vector 22 is Reserved */ |
/* Vector 22 is Reserved */ |
| 587 |
|
|