| 380 |
|
|
| 381 |
/* Reserved [0x29] */ |
/* Reserved [0x29] */ |
| 382 |
|
|
| 383 |
#define GPIOR1 SFR_IO8(0x2A) |
#define GPIOR1 _SFR_IO8(0x2A) |
| 384 |
|
|
| 385 |
#define GPIOR2 SFR_IO8(0x2B) |
#define GPIOR2 _SFR_IO8(0x2B) |
| 386 |
|
|
| 387 |
#define SPCR SFR_IO8(0x2C) |
#define SPCR _SFR_IO8(0x2C) |
| 388 |
#define SPIE 7 |
#define SPIE 7 |
| 389 |
#define SPE 6 |
#define SPE 6 |
| 390 |
#define DORD 5 |
#define DORD 5 |
| 394 |
#define SPR1 1 |
#define SPR1 1 |
| 395 |
#define SPR0 0 |
#define SPR0 0 |
| 396 |
|
|
| 397 |
#define SPSR SFR_IO8(0x2D) |
#define SPSR _SFR_IO8(0x2D) |
| 398 |
#define SPIF 7 |
#define SPIF 7 |
| 399 |
#define WCOL 6 |
#define WCOL 6 |
| 400 |
#define SPI2X 0 |
#define SPI2X 0 |
| 401 |
|
|
| 402 |
#define SPDR SFR_IO8(0X2E) |
#define SPDR _SFR_IO8(0X2E) |
| 403 |
|
|
| 404 |
/* Reserved [0x2F] */ |
/* Reserved [0x2F] */ |
| 405 |
|
|
| 406 |
#define ACSR SFR_IO8(0x30) |
#define ACSR _SFR_IO8(0x30) |
| 407 |
#define ACD 7 |
#define ACD 7 |
| 408 |
#define ACBG 6 |
#define ACBG 6 |
| 409 |
#define ACO 5 |
#define ACO 5 |
| 413 |
#define ACIS1 1 |
#define ACIS1 1 |
| 414 |
#define ACIS0 0 |
#define ACIS0 0 |
| 415 |
|
|
| 416 |
#define MONDR SFR_IO8(0x31) |
#define MONDR _SFR_IO8(0x31) |
| 417 |
#define OCDR SFR_IO8(0x31) |
#define OCDR _SFR_IO8(0x31) |
| 418 |
#define IDRD 7 |
#define IDRD 7 |
| 419 |
#define OCDR7 7 |
#define OCDR7 7 |
| 420 |
#define OCDR6 6 |
#define OCDR6 6 |