| 45 |
#ifdef DEBUG_SERIAL |
#ifdef DEBUG_SERIAL |
| 46 |
#define SER_DPRINTF(fmt, args...) \ |
#define SER_DPRINTF(fmt, args...) \ |
| 47 |
do { printf("SER: " fmt , ##args); } while (0) |
do { printf("SER: " fmt , ##args); } while (0) |
| 48 |
|
#define pic_set_irq(irq, level) \ |
| 49 |
|
do { printf("SER: set_irq(%d): %d\n", (irq), (level)); pic_set_irq((irq),(level));} while (0) |
| 50 |
#else |
#else |
| 51 |
#define SER_DPRINTF(fmt, args...) |
#define SER_DPRINTF(fmt, args...) |
| 52 |
#endif |
#endif |
| 176 |
slavio_serial_reset_chn(&s->chn[1]); |
slavio_serial_reset_chn(&s->chn[1]); |
| 177 |
} |
} |
| 178 |
|
|
| 179 |
|
static inline void clr_rxint(ChannelState *s) |
| 180 |
|
{ |
| 181 |
|
s->rxint = 0; |
| 182 |
|
if (s->chn == 0) |
| 183 |
|
s->rregs[3] &= ~0x20; |
| 184 |
|
else { |
| 185 |
|
s->otherchn->rregs[3] &= ~4; |
| 186 |
|
} |
| 187 |
|
slavio_serial_update_irq(s); |
| 188 |
|
} |
| 189 |
|
|
| 190 |
|
static inline void set_rxint(ChannelState *s) |
| 191 |
|
{ |
| 192 |
|
s->rxint = 1; |
| 193 |
|
if (s->chn == 0) |
| 194 |
|
s->rregs[3] |= 0x20; |
| 195 |
|
else { |
| 196 |
|
s->otherchn->rregs[3] |= 4; |
| 197 |
|
} |
| 198 |
|
slavio_serial_update_irq(s); |
| 199 |
|
} |
| 200 |
|
|
| 201 |
|
static inline void clr_txint(ChannelState *s) |
| 202 |
|
{ |
| 203 |
|
s->txint = 0; |
| 204 |
|
if (s->chn == 0) |
| 205 |
|
s->rregs[3] &= ~0x10; |
| 206 |
|
else { |
| 207 |
|
s->otherchn->rregs[3] &= ~2; |
| 208 |
|
} |
| 209 |
|
slavio_serial_update_irq(s); |
| 210 |
|
} |
| 211 |
|
|
| 212 |
|
static inline void set_txint(ChannelState *s) |
| 213 |
|
{ |
| 214 |
|
s->txint = 1; |
| 215 |
|
if (s->chn == 0) |
| 216 |
|
s->rregs[3] |= 0x10; |
| 217 |
|
else { |
| 218 |
|
s->otherchn->rregs[3] |= 2; |
| 219 |
|
} |
| 220 |
|
slavio_serial_update_irq(s); |
| 221 |
|
} |
| 222 |
|
|
| 223 |
static void slavio_serial_mem_writeb(void *opaque, target_phys_addr_t addr, uint32_t val) |
static void slavio_serial_mem_writeb(void *opaque, target_phys_addr_t addr, uint32_t val) |
| 224 |
{ |
{ |
| 225 |
SerialState *ser = opaque; |
SerialState *ser = opaque; |
| 244 |
newreg |= 0x8; |
newreg |= 0x8; |
| 245 |
break; |
break; |
| 246 |
case 0x20: |
case 0x20: |
| 247 |
s->rxint = 0; |
clr_rxint(s); |
| 248 |
break; |
break; |
| 249 |
case 0x28: |
case 0x28: |
| 250 |
s->txint = 0; |
clr_txint(s); |
| 251 |
|
break; |
| 252 |
|
case 0x38: |
| 253 |
|
clr_rxint(s); |
| 254 |
|
clr_txint(s); |
| 255 |
break; |
break; |
| 256 |
default: |
default: |
| 257 |
break; |
break; |
| 297 |
s->txint = 1; |
s->txint = 1; |
| 298 |
s->rregs[0] |= 4; // Tx buffer empty |
s->rregs[0] |= 4; // Tx buffer empty |
| 299 |
s->rregs[1] |= 1; // All sent |
s->rregs[1] |= 1; // All sent |
| 300 |
// Interrupts reported only on channel A |
set_txint(s); |
|
if (s->chn == 0) |
|
|
s->rregs[3] |= 0x10; |
|
|
else { |
|
|
s->otherchn->rregs[3] |= 2; |
|
|
} |
|
| 301 |
slavio_serial_update_irq(s); |
slavio_serial_update_irq(s); |
| 302 |
} |
} |
| 303 |
break; |
break; |
| 325 |
return ret; |
return ret; |
| 326 |
case 1: |
case 1: |
| 327 |
s->rregs[0] &= ~1; |
s->rregs[0] &= ~1; |
| 328 |
|
clr_rxint(s); |
| 329 |
if (s->type == kbd) |
if (s->type == kbd) |
| 330 |
ret = get_queue(s); |
ret = get_queue(s); |
| 331 |
else |
else |
| 350 |
|
|
| 351 |
static void serial_receive_byte(ChannelState *s, int ch) |
static void serial_receive_byte(ChannelState *s, int ch) |
| 352 |
{ |
{ |
| 353 |
|
SER_DPRINTF("put ch %d\n", ch); |
| 354 |
s->rregs[0] |= 1; |
s->rregs[0] |= 1; |
|
// Interrupts reported only on channel A |
|
|
if (s->chn == 0) |
|
|
s->rregs[3] |= 0x20; |
|
|
else { |
|
|
s->otherchn->rregs[3] |= 4; |
|
|
} |
|
| 355 |
s->rx = ch; |
s->rx = ch; |
| 356 |
s->rxint = 1; |
set_rxint(s); |
|
slavio_serial_update_irq(s); |
|
| 357 |
} |
} |
| 358 |
|
|
| 359 |
static void serial_receive_break(ChannelState *s) |
static void serial_receive_break(ChannelState *s) |