| 59 |
#define CPU_MEM_INDEX ((env->hflags & MIPS_HFLAG_MODE) == MIPS_HFLAG_UM) |
#define CPU_MEM_INDEX ((env->hflags & MIPS_HFLAG_MODE) == MIPS_HFLAG_UM) |
| 60 |
#elif defined (TARGET_SPARC) |
#elif defined (TARGET_SPARC) |
| 61 |
#define CPU_MEM_INDEX ((env->psrs) == 0) |
#define CPU_MEM_INDEX ((env->psrs) == 0) |
| 62 |
|
#elif defined (TARGET_ARM) |
| 63 |
|
#define CPU_MEM_INDEX ((env->uncached_cpsr & CPSR_M) == ARM_CPU_MODE_USR) |
| 64 |
|
#else |
| 65 |
|
#error unsupported CPU |
| 66 |
#endif |
#endif |
| 67 |
#define MMUSUFFIX _mmu |
#define MMUSUFFIX _mmu |
| 68 |
|
|
| 76 |
#define CPU_MEM_INDEX ((env->hflags & MIPS_HFLAG_MODE) == MIPS_HFLAG_UM) |
#define CPU_MEM_INDEX ((env->hflags & MIPS_HFLAG_MODE) == MIPS_HFLAG_UM) |
| 77 |
#elif defined (TARGET_SPARC) |
#elif defined (TARGET_SPARC) |
| 78 |
#define CPU_MEM_INDEX ((env->psrs) == 0) |
#define CPU_MEM_INDEX ((env->psrs) == 0) |
| 79 |
|
#elif defined (TARGET_ARM) |
| 80 |
|
#define CPU_MEM_INDEX ((env->uncached_cpsr & CPSR_M) == ARM_CPU_MODE_USR) |
| 81 |
|
#else |
| 82 |
|
#error unsupported CPU |
| 83 |
#endif |
#endif |
| 84 |
#define MMUSUFFIX _cmmu |
#define MMUSUFFIX _cmmu |
| 85 |
|
|