| 24 |
register uint32_t T1 asm(AREG2); |
register uint32_t T1 asm(AREG2); |
| 25 |
register uint32_t T2 asm(AREG3); |
register uint32_t T2 asm(AREG3); |
| 26 |
|
|
| 27 |
|
/* TODO: Put these in FP regs on targets that have such things. */ |
| 28 |
|
/* It is ok for FT0s and FT0d to overlap. Likewise FT1s and FT1d. */ |
| 29 |
|
#define FT0s env->vfp.tmp0s |
| 30 |
|
#define FT1s env->vfp.tmp1s |
| 31 |
|
#define FT0d env->vfp.tmp0d |
| 32 |
|
#define FT1d env->vfp.tmp1d |
| 33 |
|
|
| 34 |
#include "cpu.h" |
#include "cpu.h" |
| 35 |
#include "exec-all.h" |
#include "exec-all.h" |
| 36 |
|
|
|
void cpu_lock(void); |
|
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void cpu_unlock(void); |
|
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void cpu_loop_exit(void); |
|
|
|
|
| 37 |
/* Implemented CPSR bits. */ |
/* Implemented CPSR bits. */ |
| 38 |
#define CACHED_CPSR_BITS 0xf8000000 |
#define CACHED_CPSR_BITS 0xf8000000 |
| 39 |
static inline int compute_cpsr(void) |
static inline int compute_cpsr(void) |
| 54 |
|
|
| 55 |
int cpu_arm_handle_mmu_fault (CPUState *env, target_ulong address, int rw, |
int cpu_arm_handle_mmu_fault (CPUState *env, target_ulong address, int rw, |
| 56 |
int is_user, int is_softmmu); |
int is_user, int is_softmmu); |
| 57 |
|
|
| 58 |
|
/* In op_helper.c */ |
| 59 |
|
|
| 60 |
|
void cpu_lock(void); |
| 61 |
|
void cpu_unlock(void); |
| 62 |
|
void cpu_loop_exit(void); |
| 63 |
|
|
| 64 |
|
void raise_exception(int); |
| 65 |
|
|
| 66 |
|
void do_vfp_abss(void); |
| 67 |
|
void do_vfp_absd(void); |
| 68 |
|
void do_vfp_negs(void); |
| 69 |
|
void do_vfp_negd(void); |
| 70 |
|
void do_vfp_sqrts(void); |
| 71 |
|
void do_vfp_sqrtd(void); |
| 72 |
|
void do_vfp_cmps(void); |
| 73 |
|
void do_vfp_cmpd(void); |
| 74 |
|
void do_vfp_cmpes(void); |
| 75 |
|
void do_vfp_cmped(void); |
| 76 |
|
void do_vfp_set_fpscr(void); |
| 77 |
|
void do_vfp_get_fpscr(void); |