| 265 |
"RSI=%016llx RDI=%016llx RBP=%016llx RSP=%016llx\n" |
"RSI=%016llx RDI=%016llx RBP=%016llx RSP=%016llx\n" |
| 266 |
"R8 =%016llx R9 =%016llx R10=%016llx R11=%016llx\n" |
"R8 =%016llx R9 =%016llx R10=%016llx R11=%016llx\n" |
| 267 |
"R12=%016llx R13=%016llx R14=%016llx R15=%016llx\n" |
"R12=%016llx R13=%016llx R14=%016llx R15=%016llx\n" |
| 268 |
"RIP=%016llx RFL=%08x [%c%c%c%c%c%c%c] CPL=%d II=%d A20=%d\n", |
"RIP=%016llx RFL=%08x [%c%c%c%c%c%c%c] CPL=%d II=%d A20=%d HLT=%d\n", |
| 269 |
env->regs[R_EAX], |
env->regs[R_EAX], |
| 270 |
env->regs[R_EBX], |
env->regs[R_EBX], |
| 271 |
env->regs[R_ECX], |
env->regs[R_ECX], |
| 292 |
eflags & CC_C ? 'C' : '-', |
eflags & CC_C ? 'C' : '-', |
| 293 |
env->hflags & HF_CPL_MASK, |
env->hflags & HF_CPL_MASK, |
| 294 |
(env->hflags >> HF_INHIBIT_IRQ_SHIFT) & 1, |
(env->hflags >> HF_INHIBIT_IRQ_SHIFT) & 1, |
| 295 |
(env->a20_mask >> 20) & 1); |
(env->a20_mask >> 20) & 1, |
| 296 |
|
(env->hflags >> HF_HALTED_SHIFT) & 1); |
| 297 |
} else |
} else |
| 298 |
#endif |
#endif |
| 299 |
{ |
{ |
| 300 |
cpu_fprintf(f, "EAX=%08x EBX=%08x ECX=%08x EDX=%08x\n" |
cpu_fprintf(f, "EAX=%08x EBX=%08x ECX=%08x EDX=%08x\n" |
| 301 |
"ESI=%08x EDI=%08x EBP=%08x ESP=%08x\n" |
"ESI=%08x EDI=%08x EBP=%08x ESP=%08x\n" |
| 302 |
"EIP=%08x EFL=%08x [%c%c%c%c%c%c%c] CPL=%d II=%d A20=%d\n", |
"EIP=%08x EFL=%08x [%c%c%c%c%c%c%c] CPL=%d II=%d A20=%d HLT=%d\n", |
| 303 |
(uint32_t)env->regs[R_EAX], |
(uint32_t)env->regs[R_EAX], |
| 304 |
(uint32_t)env->regs[R_EBX], |
(uint32_t)env->regs[R_EBX], |
| 305 |
(uint32_t)env->regs[R_ECX], |
(uint32_t)env->regs[R_ECX], |
| 318 |
eflags & CC_C ? 'C' : '-', |
eflags & CC_C ? 'C' : '-', |
| 319 |
env->hflags & HF_CPL_MASK, |
env->hflags & HF_CPL_MASK, |
| 320 |
(env->hflags >> HF_INHIBIT_IRQ_SHIFT) & 1, |
(env->hflags >> HF_INHIBIT_IRQ_SHIFT) & 1, |
| 321 |
(env->a20_mask >> 20) & 1); |
(env->a20_mask >> 20) & 1, |
| 322 |
|
(env->hflags >> HF_HALTED_SHIFT) & 1); |
| 323 |
} |
} |
| 324 |
|
|
| 325 |
#ifdef TARGET_X86_64 |
#ifdef TARGET_X86_64 |