| 655 |
msr_dr = (value >> MSR_DR) & 0x01; |
msr_dr = (value >> MSR_DR) & 0x01; |
| 656 |
msr_ri = (value >> MSR_RI) & 0x01; |
msr_ri = (value >> MSR_RI) & 0x01; |
| 657 |
msr_le = (value >> MSR_LE) & 0x01; |
msr_le = (value >> MSR_LE) & 0x01; |
| 658 |
|
/* XXX: should enter PM state if msr_pow has been set */ |
| 659 |
} |
} |
| 660 |
|
|
| 661 |
|
#if defined (CONFIG_USER_ONLY) |
| 662 |
void do_interrupt (CPUState *env) |
void do_interrupt (CPUState *env) |
| 663 |
{ |
{ |
| 664 |
#if defined (CONFIG_USER_ONLY) |
env->exception_index = -1; |
| 665 |
env->exception_index |= 0x100; |
} |
| 666 |
#else |
#else |
| 667 |
|
void do_interrupt (CPUState *env) |
| 668 |
|
{ |
| 669 |
uint32_t msr; |
uint32_t msr; |
| 670 |
int excp = env->exception_index; |
int excp; |
| 671 |
|
|
| 672 |
|
excp = env->exception_index; |
| 673 |
msr = _load_msr(env); |
msr = _load_msr(env); |
| 674 |
#if defined (DEBUG_EXCEPTIONS) |
#if defined (DEBUG_EXCEPTIONS) |
| 675 |
if ((excp == EXCP_PROGRAM || excp == EXCP_DSI) && msr_pr == 1) |
if ((excp == EXCP_PROGRAM || excp == EXCP_DSI) && msr_pr == 1) |
| 911 |
#else |
#else |
| 912 |
T0 = 0; |
T0 = 0; |
| 913 |
#endif |
#endif |
|
#endif |
|
| 914 |
env->exception_index = -1; |
env->exception_index = -1; |
| 915 |
} |
} |
| 916 |
|
#endif /* !CONFIG_USER_ONLY */ |