| 22 |
#include "exec.h" |
#include "exec.h" |
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| 24 |
#define regs (env) |
#define regs (env) |
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extern uint32_t __a; |
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extern uint32_t __b; |
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extern uint32_t __c; |
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extern uint32_t __d; |
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extern uint32_t __e; |
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extern uint32_t __f; |
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#define Ts0 (int32_t)T0 |
#define Ts0 (int32_t)T0 |
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#define Ts1 (int32_t)T1 |
#define Ts1 (int32_t)T1 |
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#define Ts2 (int32_t)T2 |
#define Ts2 (int32_t)T2 |
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| 29 |
#include "op-multi.c" |
#define FT0 (env->ft0) |
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| 31 |
#define PPC_OP(name) void op_##name(void) |
#define PPC_OP(name) void op_##name(void) |
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| 33 |
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#define REG 0 |
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#include "op_template.h" |
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#define REG 1 |
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#include "op_template.h" |
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#define REG 2 |
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#include "op_template.h" |
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#define REG 3 |
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#include "op_template.h" |
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#define REG 4 |
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#include "op_template.h" |
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| 48 |
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#define REG 5 |
| 49 |
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#include "op_template.h" |
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| 51 |
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#define REG 6 |
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#include "op_template.h" |
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#define REG 7 |
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#include "op_template.h" |
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| 57 |
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#define REG 8 |
| 58 |
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#include "op_template.h" |
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| 60 |
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#define REG 9 |
| 61 |
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#include "op_template.h" |
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| 63 |
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#define REG 10 |
| 64 |
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#include "op_template.h" |
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| 66 |
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#define REG 11 |
| 67 |
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#include "op_template.h" |
| 68 |
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| 69 |
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#define REG 12 |
| 70 |
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#include "op_template.h" |
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| 72 |
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#define REG 13 |
| 73 |
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#include "op_template.h" |
| 74 |
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| 75 |
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#define REG 14 |
| 76 |
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#include "op_template.h" |
| 77 |
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| 78 |
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#define REG 15 |
| 79 |
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#include "op_template.h" |
| 80 |
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| 81 |
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#define REG 16 |
| 82 |
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#include "op_template.h" |
| 83 |
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| 84 |
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#define REG 17 |
| 85 |
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#include "op_template.h" |
| 86 |
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| 87 |
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#define REG 18 |
| 88 |
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#include "op_template.h" |
| 89 |
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| 90 |
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#define REG 19 |
| 91 |
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#include "op_template.h" |
| 92 |
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| 93 |
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#define REG 20 |
| 94 |
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#include "op_template.h" |
| 95 |
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| 96 |
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#define REG 21 |
| 97 |
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#include "op_template.h" |
| 98 |
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| 99 |
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#define REG 22 |
| 100 |
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#include "op_template.h" |
| 101 |
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| 102 |
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#define REG 23 |
| 103 |
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#include "op_template.h" |
| 104 |
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| 105 |
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#define REG 24 |
| 106 |
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#include "op_template.h" |
| 107 |
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| 108 |
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#define REG 25 |
| 109 |
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#include "op_template.h" |
| 110 |
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| 111 |
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#define REG 26 |
| 112 |
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#include "op_template.h" |
| 113 |
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| 114 |
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#define REG 27 |
| 115 |
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#include "op_template.h" |
| 116 |
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| 117 |
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#define REG 28 |
| 118 |
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#include "op_template.h" |
| 119 |
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| 120 |
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#define REG 29 |
| 121 |
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#include "op_template.h" |
| 122 |
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| 123 |
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#define REG 30 |
| 124 |
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#include "op_template.h" |
| 125 |
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| 126 |
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#define REG 31 |
| 127 |
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#include "op_template.h" |
| 128 |
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| 129 |
/* PPC state maintenance operations */ |
/* PPC state maintenance operations */ |
| 130 |
/* set_Rc0 */ |
/* set_Rc0 */ |
| 131 |
PPC_OP(set_Rc0) |
PPC_OP(set_Rc0) |
| 1204 |
do_stsw(PARAM(1), T0, T1 + T2); |
do_stsw(PARAM(1), T0, T1 + T2); |
| 1205 |
RETURN(); |
RETURN(); |
| 1206 |
} |
} |
| 1207 |
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| 1208 |
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/* SPR */ |
| 1209 |
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PPC_OP(load_spr) |
| 1210 |
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{ |
| 1211 |
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T0 = regs->spr[PARAM(1)]; |
| 1212 |
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} |
| 1213 |
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| 1214 |
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PPC_OP(store_spr) |
| 1215 |
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{ |
| 1216 |
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regs->spr[PARAM(1)] = T0; |
| 1217 |
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} |
| 1218 |
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| 1219 |
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/* FPSCR */ |
| 1220 |
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PPC_OP(load_fpscr) |
| 1221 |
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{ |
| 1222 |
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T0 = do_load_fpscr(); |
| 1223 |
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} |
| 1224 |
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| 1225 |
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PPC_OP(store_fpscr) |
| 1226 |
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{ |
| 1227 |
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do_store_fpscr(PARAM(1), T0); |
| 1228 |
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} |
| 1229 |
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| 1230 |
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/*** Floating-point store ***/ |
| 1231 |
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| 1232 |
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static inline uint32_t dtos(uint64_t f) |
| 1233 |
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{ |
| 1234 |
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unsigned int e, m, s; |
| 1235 |
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e = (((f >> 52) & 0x7ff) - 1022) + 126; |
| 1236 |
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s = (f >> 63); |
| 1237 |
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m = (f >> 29); |
| 1238 |
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return (s << 31) | (e << 23) | m; |
| 1239 |
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} |
| 1240 |
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| 1241 |
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static inline uint64_t stod(uint32_t f) |
| 1242 |
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{ |
| 1243 |
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unsigned int e, m, s; |
| 1244 |
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e = ((f >> 23) & 0xff) - 126 + 1022; |
| 1245 |
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s = f >> 31; |
| 1246 |
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m = f & ((1 << 23) - 1); |
| 1247 |
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return ((uint64_t)s << 63) | ((uint64_t)e << 52) | ((uint64_t)m << 29); |
| 1248 |
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} |
| 1249 |
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| 1250 |
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PPC_OP(stfd_z_FT0) |
| 1251 |
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{ |
| 1252 |
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st64(SPARAM(1), FT0); |
| 1253 |
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} |
| 1254 |
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| 1255 |
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PPC_OP(stfd_FT0) |
| 1256 |
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{ |
| 1257 |
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T0 += SPARAM(1); |
| 1258 |
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st64(T0, FT0); |
| 1259 |
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} |
| 1260 |
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| 1261 |
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PPC_OP(stfdx_z_FT0) |
| 1262 |
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{ |
| 1263 |
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st64(T0, FT0); |
| 1264 |
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} |
| 1265 |
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| 1266 |
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PPC_OP(stfdx_FT0) |
| 1267 |
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{ |
| 1268 |
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T0 += T1; |
| 1269 |
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st64(T0, FT0); |
| 1270 |
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} |
| 1271 |
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| 1272 |
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| 1273 |
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PPC_OP(stfs_z_FT0) |
| 1274 |
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{ |
| 1275 |
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st32(SPARAM(1), dtos(FT0)); |
| 1276 |
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} |
| 1277 |
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| 1278 |
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PPC_OP(stfs_FT0) |
| 1279 |
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{ |
| 1280 |
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T0 += SPARAM(1); |
| 1281 |
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st32(T0, dtos(FT0)); |
| 1282 |
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} |
| 1283 |
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| 1284 |
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PPC_OP(stfsx_z_FT0) |
| 1285 |
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{ |
| 1286 |
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st32(T0, dtos(FT0)); |
| 1287 |
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} |
| 1288 |
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| 1289 |
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PPC_OP(stfsx_FT0) |
| 1290 |
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{ |
| 1291 |
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T0 += T1; |
| 1292 |
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st32(T0, dtos(FT0)); |
| 1293 |
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} |
| 1294 |
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| 1295 |
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/*** Floating-point load ***/ |
| 1296 |
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PPC_OP(lfd_z_FT0) |
| 1297 |
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{ |
| 1298 |
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FT0 = ld64(SPARAM(1)); |
| 1299 |
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} |
| 1300 |
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| 1301 |
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PPC_OP(lfd_FT0) |
| 1302 |
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{ |
| 1303 |
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T0 += SPARAM(1); |
| 1304 |
|
FT0 = ld64(T0); |
| 1305 |
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} |
| 1306 |
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| 1307 |
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PPC_OP(lfdx_z_FT0) |
| 1308 |
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{ |
| 1309 |
|
FT0 = ld64(T0); |
| 1310 |
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} |
| 1311 |
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| 1312 |
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PPC_OP(lfdx_FT0) |
| 1313 |
|
{ |
| 1314 |
|
T0 += T1; |
| 1315 |
|
FT0 = ld64(T0); |
| 1316 |
|
} |
| 1317 |
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| 1318 |
|
PPC_OP(lfs_z_FT0) |
| 1319 |
|
{ |
| 1320 |
|
FT0 = stod(ld32(SPARAM(1))); |
| 1321 |
|
} |
| 1322 |
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|
| 1323 |
|
PPC_OP(lfs_FT0) |
| 1324 |
|
{ |
| 1325 |
|
T0 += SPARAM(1); |
| 1326 |
|
FT0 = stod(ld32(T0)); |
| 1327 |
|
} |
| 1328 |
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|
| 1329 |
|
PPC_OP(lfsx_z_FT0) |
| 1330 |
|
{ |
| 1331 |
|
FT0 = stod(ld32(T0)); |
| 1332 |
|
} |
| 1333 |
|
|
| 1334 |
|
PPC_OP(lfsx_FT0) |
| 1335 |
|
{ |
| 1336 |
|
T0 += T1; |
| 1337 |
|
FT0 = stod(ld32(T0)); |
| 1338 |
|
} |