| 37 |
void registers::set_reg( int CWP, int n, bit_word val ) |
void registers::set_reg( int CWP, int n, bit_word val ) |
| 38 |
{ |
{ |
| 39 |
/* writing to regs[0] is ignored */ |
/* writing to regs[0] is ignored */ |
| 40 |
if ( n > 0 && n < 8 ) |
if ( n >= 0 && n < 8 ) |
| 41 |
regs[n] = val; |
regs[n] = val; |
| 42 |
else if ( n >= 8 && n < 32 ) |
else if ( n >= 8 && n < 32 ) |
| 43 |
regs[8 + ( n - 8 + CWP*16)%(win_num*16) ] = val; |
regs[8 + ( n - 8 + CWP*16)%(win_num*16) ] = val; |
| 47 |
} |
} |
| 48 |
bit_word registers::get_reg( int CWP, int n ) |
bit_word registers::get_reg( int CWP, int n ) |
| 49 |
{ |
{ |
| 50 |
if ( n > 0 && n < 8 ) |
if ( n >= 0 && n < 8 ) |
| 51 |
return regs[n]; |
return regs[n]; |
| 52 |
else if ( n >= 8 && n < 32 ) |
else if ( n >= 8 && n < 32 ) |
| 53 |
return regs[8 + ( n - 8 + CWP*16)%(win_num*16) ]; |
return regs[8 + ( n - 8 + CWP*16)%(win_num*16) ]; |
| 70 |
iw.format == instr_word::sethi_format ) |
iw.format == instr_word::sethi_format ) |
| 71 |
dst = iw.dst; |
dst = iw.dst; |
| 72 |
|
|
| 73 |
|
#ifdef VMDEBUG |
| 74 |
|
try { cout.form("Registers::process_out: R[src1=%i]=%08X, " |
| 75 |
|
"R[src2=%i]=%08X, R[dst=%i]=%08X \n", |
| 76 |
|
src1,get_reg(CWP,src1), |
| 77 |
|
src2,get_reg(CWP,src2), |
| 78 |
|
dst,get_reg(CWP,dst) ); |
| 79 |
|
} catch(ex<vmachine> e) { |
| 80 |
|
cout.form("Registers::process_out: R[src1=%i], " |
| 81 |
|
"R[src2=%i], R[dst=%i] [exception]\n", |
| 82 |
|
src1, src2, dst ); |
| 83 |
|
} |
| 84 |
|
#endif |
| 85 |
|
|
| 86 |
set_out( 0, get_reg(CWP,src1) ); |
set_out( 0, get_reg(CWP,src1) ); |
| 87 |
set_out( 1, get_reg(CWP,src2) ); |
set_out( 1, get_reg(CWP,src2) ); |
| 88 |
set_out( 2, get_reg(CWP,dst) ); |
if ( iw.group == instr_word::store ) |
| 89 |
|
set_out( 2, get_reg(CWP,dst) ); |
| 90 |
|
else |
| 91 |
|
set_out( 2, 0 ); |
| 92 |
} |
} |
| 93 |
void registers::process_in(int CWP) |
void registers::process_in(int CWP) |
| 94 |
{ |
{ |
| 96 |
set_reg( CWP, in, get_in(1) ); |
set_reg( CWP, in, get_in(1) ); |
| 97 |
} |
} |
| 98 |
|
|
| 99 |
|
void registers::zero( void ) |
| 100 |
|
{ |
| 101 |
|
for( unsigned int i = 0 ; i < regs.size() ; i++ ) |
| 102 |
|
regs[i] = 0; |
| 103 |
|
} |